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2026 iThome 鐵人賽

DAY 4
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Software Development

猴子都寫得出來的 RISC-V OoO CPU系列 第 4

Simple Emulator based on systemC

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  • xImage
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這次目標是理解最基本的 OOO CPU 怎麼設計
指令集就用最簡單的 I+M,讓我們可以觀察不同長度的指令在 pipeline 裡面是怎麼運作的

先從算術指令集開始做起
做一個當作 bit true reference platform 的 Emulator
省略流程控制指令和 ld/st 相關指令讓開發流程更單純
這個實作也省略了 memory 和 program loader,指令使用 binary array 寫在 test case 裡

  • RV32I immediate arithmetic:
    • ADDI
    • SLTI
    • SLTIU
    • XORI
    • ORI
    • ANDI
    • SLLI
    • SRLI
    • SRAI
  • RV32I register arithmetic:
    • ADD
    • SUB
    • SLL
    • SLT
    • SLTU
    • XOR
    • SRL
    • SRA
    • OR
    • AND
  • RV32M multiplication and division:
    • MUL
    • MULH
    • MULHSU
    • MULHU
    • DIV
    • DIVU
    • REM
    • REMU

Demo

Fri Sep 18 11:18 PM [~/TINY5_OOO]
root@HSU-PC:[TINY5_OOO]<main>$ ./run_docker.sh
...
root@8331e3493c62:/workspace# cd riscv_emulator/
root@8331e3493c62:/workspace/riscv_emulator# ./run.sh
-- The CXX compiler identification is GNU 11.4.0
-- Detecting CXX compiler ABI info
-- Detecting CXX compiler ABI info - done
-- Check for working CXX compiler: /usr/bin/c++ - skipped
-- Detecting CXX compile features
-- Detecting CXX compile features - done
-- Found SystemC 3.0.2.20251031 via SystemCLanguage
-- Configuring done
-- Generating done
-- Build files have been written to: /workspace/riscv_emulator/build
[ 25%] Building CXX object CMakeFiles/rv32im_cpu.dir/src/rv32im_cpu.cpp.o
[ 50%] Linking CXX static library librv32im_cpu.a
[ 50%] Built target rv32im_cpu
[ 75%] Building CXX object CMakeFiles/rv32im_tests.dir/tests/rv32im_tests.cpp.o
[100%] Linking CXX executable rv32im_tests
[100%] Built target rv32im_tests
Internal ctest changing into directory: /workspace/riscv_emulator/build
Test project /workspace/riscv_emulator/build
    Start 1: rv32im_arithmetic
1/1 Test #1: rv32im_arithmetic ................   Passed    0.01 sec

100% tests passed, 0 tests failed out of 1

Total Test time (real) =   0.01 sec

        SystemC 3.0.2-Accellera --- Sep 17 2026 05:03:41
        Copyright (c) 1996-2025 by all Contributors,
        ALL RIGHTS RESERVED
[PASS] RV32I register arithmetic
[PASS] RV32I immediate arithmetic
[PASS] RV32M multiply and divide
[PASS] RV32M division corner cases
[PASS] hard-wired x0
[PASS] unsupported opcode
[PASS] truncated instruction
All RV32IM arithmetic tests passed

Info: /OSCI/SystemC: Simulation stopped by user.

github link with tag: https://github.com/hsufit/TINY5_OOO/tree/ithome2026_D4


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SystemC Hello
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Memory Interface
系列文
猴子都寫得出來的 RISC-V OoO CPU5
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